How SEALSQ's IC'ALPS Acquisition Enables Hardware-Based Quantum-Resistant Security for Embedded Systems
- adammiller961
- Oct 2
- 10 min read
Introduction – What is Quantum-Resistant Hardware and Why Does It Matter?
The cybersecurity landscape faces an unprecedented challenge: quantum computers capable of breaking today's encryption standards are no longer theoretical. As quantum computing advances, traditional cryptographic systems such as RSA and ECC (Elliptic Curve Cryptography) become increasingly vulnerable to attack. For engineers designing embedded systems with 10–20 year operational lifespans, this represents a critical threat to data integrity, authentication, and secure communications.
In August 2025, SEALSQ completed its acquisition of IC'ALPS, a French ASIC design house, in a strategic move that addresses this quantum threat head-on. This merger combines SEALSQ's expertise in post-quantum cryptographic hardware with IC'ALPS' proven capability in custom ASIC development, creating a unique capability: embedding quantum-resistant security directly into silicon.
For electronic engineers and system designers, this acquisition delivers access to quantum-resistant hardware solutions that were previously unavailable. Instead of relying on software-based post-quantum cryptography (PQC) implementations or external security co-processors, engineers can now integrate NIST-approved quantum-resistant algorithms into custom ASICs optimised for their specific applications. This article examines how SEALSQ's expanded capabilities enable hardware-based quantum-resistant security for automotive, industrial IoT, medical devices, and other safety-critical embedded systems.
Features of SEALSQ's Expanded Quantum-Resistant Hardware Capabilities
The SEALSQ-IC'ALPS merger delivers several key technical capabilities that fundamentally change how engineers can approach embedded security design:
Custom ASIC Design with Integrated Post-Quantum Cryptography
IC'ALPS brings approximately 90 experienced IC designers to SEALSQ, expanding the European semiconductor team to over 150 engineers. This in-house ASIC design capability means SEALSQ can now develop application-specific integrated circuits from initial specifications through tape-out and production management. Engineers gain access to custom silicon solutions that embed post-quantum cryptographic engines directly into hardware, rather than relying on software implementations or discrete security chips.
The technical advantage is significant: ASIC implementations of PQC algorithms offer superior performance and dramatically lower power consumption compared to software-based solutions running on general-purpose processors. This efficiency is critical for constrained embedded systems where processing power and energy budgets are limited.
NIST-Approved Post-Quantum Algorithms in Silicon
SEALSQ's security IP includes the recently standardised NIST post-quantum cryptographic algorithms, specifically CRYSTALS-Kyber for key encapsulation and CRYSTALS-Dilithium for digital signatures. These algorithms are designed to withstand attacks from both classical and quantum computers.
By integrating IC'ALPS' ASIC design expertise, SEALSQ can now implement these computationally intensive algorithms in dedicated silicon co-processors and hardware accelerators. This hardware implementation approach delivers:
Faster cryptographic operations compared to software execution
Lower power consumption during encryption and authentication processes
Reduced processing load on the main system CPU
Tamper-resistant execution protected by hardware security features
The combined team is developing custom derivatives of SEALSQ's QS7001 hardware platform that integrate Kyber, Dilithium, and traditional cryptographic countermeasures at the silicon level, designed to meet FIPS 140-3 and Common Criteria EAL5+ security certifications.
End-to-End Secure ASIC Solutions
IC'ALPS' expertise extends beyond front-end chip design to encompass ASIC industrialisation and supply chain management. This enables SEALSQ to offer turnkey quantum-resistant hardware solutions, handling everything from design through fabrication, packaging, and cryptographic key provisioning.
For engineering teams, this vertical integration streamlines development cycles and reduces time-to-market. Security requirements are addressed from the initial design phase rather than added as an afterthought, resulting in architectures that are co-optimised for functional performance, power efficiency, and quantum-resistant security.
Safety-Critical System Certification
IC'ALPS brings domain-specific expertise in automotive and medical chip design, including ISO 26262 (ASIL) certification for functional safety and ISO 13485 certification for medical devices. This means SEALSQ can now design quantum-resistant hardware that meets the rigorous safety and reliability standards required in vehicles, avionics, and healthcare equipment.
This capability enables a new class of secure ASICs where a single chip handles both cryptographic operations and critical control tasks whilst conforming to ASIL-D safety levels. For automotive applications, this addresses the dual challenge of preventing cyber attacks on connected vehicles whilst maintaining functional safety standards.
Detailed Specifications: SEALSQ QS7001 Platform with Post-Quantum Capabilities
The QS7001 represents SEALSQ's quantum-resistant hardware platform, now enhanced with IC'ALPS' custom ASIC design capabilities:
Specification | Details |
Architecture | RISC-V secure microcontroller with post-quantum cryptographic acceleration |
PQC Algorithms | CRYSTALS-Kyber (Key Encapsulation Mechanism), CRYSTALS-Dilithium (Digital Signature Algorithm) |
Security Certifications | FIPS 140-3, Common Criteria EAL5+ compliant design |
Hardware Security | Secure boot with PQC signature verification, on-chip TRNG (True Random Number Generator), tamper detection, side-channel attack resistance |
Process Nodes | Scalable from 0.18 µm to advanced nanometre nodes (via IC'ALPS capability) |
Design Services | Full custom ASIC development: specification through tape-out, mixed-signal integration, analogue/digital co-design |
Safety Certifications | ISO 26262 (automotive functional safety), ISO 13485 (medical devices) |
Target Applications | Automotive ECUs, industrial IoT, medical implantables, aerospace systems, secure communications |
Power Optimisation | Hardware-accelerated PQC reduces power consumption vs software implementations |
Integration Options | Standalone secure element, integrated security subsystem in larger SoC |
The first product from this collaboration, the QVault TPM (Trusted Platform Module), is expected in early 2026, showcasing quantum-resistant features built on the QS7001 RISC-V architecture with IC'ALPS' ASIC design implementation.
Industry Applications and Use Cases for Quantum-Resistant Hardware
The SEALSQ-IC'ALPS combined capabilities address security challenges across multiple sectors where embedded systems require both quantum-resistant protection and domain-specific optimisation:
Automotive Electronics
Modern vehicles are increasingly connected and autonomous, creating new attack surfaces that require quantum-resistant security. SEALSQ's quantum-resistant hardware addresses automotive-specific requirements:
Secure Vehicle-to-Everything (V2X) Communications: Quantum-resistant encryption protects vehicle communications from future quantum attacks, ensuring long-term security for autonomous driving systems.
Electronic Control Unit (ECU) Security: Custom secure ASICs combine post-quantum authentication with ISO 26262 functional safety requirements in a single chip solution.
Over-the-Air (OTA) Update Protection: Dilithium digital signatures provide quantum-resistant authentication for firmware updates, preventing unauthorised code injection.
Battery Management Systems: Secure ASICs for electric vehicles integrate quantum-resistant security with precision analog sensing and power management.
The automotive market demands chips with 15+ year operational lifespans, making quantum-resistant security essential as quantum computers develop during these vehicles' service lives.
Industrial IoT and Automation
Industrial control systems require both robust security and long-term reliability. SEALSQ's capabilities enable:
Secure Industrial Sensors: Low-power quantum-resistant hardware protects sensor data and authenticates devices in smart factory environments.
Programmable Logic Controllers (PLCs): Custom ASICs integrate quantum-resistant security with real-time control functions and fieldbus communications.
Remote Monitoring Systems: Hardware-accelerated PQC enables secure data transmission from edge devices without excessive power consumption.
Predictive Maintenance Platforms: Quantum-resistant authentication ensures the integrity of sensor data used for critical maintenance decisions.
Medical Devices and Healthcare
Medical implantables and connected healthcare devices require security that protects patient data for decades. SEALSQ's ISO 13485-certified design capability delivers:
Implantable Device Security: Ultra-low-power quantum-resistant hardware protects pacemakers, insulin pumps, and neurostimulators from unauthorised access.
Medical Imaging Equipment: Secure ASICs protect patient data and ensure diagnostic image integrity with quantum-resistant encryption.
Remote Patient Monitoring: Hardware-based PQC secures continuous health data transmission whilst minimising power consumption.
Pharmaceutical Cold Chain Monitoring: Tamper-resistant quantum-resistant hardware ensures integrity of temperature and location data for vaccine distribution.
Aerospace and Defence
Satellite systems, aircraft avionics, and defence communications require security solutions with extreme longevity and reliability:
Satellite Communications: Quantum-resistant hardware protects communications for satellites with 15+ year orbital lifespans.
Avionics Systems: Safety-critical flight control systems with integrated quantum-resistant security and functional safety certification.
Secure Military Communications: Hardware-based PQC provides communications security against current and future quantum threats.
Unmanned Systems: Secure ASICs protect autonomous drones and ground vehicles from cyber attacks and unauthorised control.
Strategic Advantages: What SEALSQ Can Deliver Now
The IC'ALPS acquisition fundamentally transforms SEALSQ's market position and technical capabilities. Prior to this merger, SEALSQ offered post-quantum security IP and discrete secure elements. Now, the combined entity delivers:
Single-Source Quantum-Resistant ASIC Solutions
Engineers can work with SEALSQ to develop fully custom secure chips tailored to specific applications. This includes:
Application-specific processing (ARM Cortex, RISC-V, or custom cores)
Analog and mixed-signal interfaces (sensors, power management, communications)
Quantum-resistant cryptographic engines (Kyber, Dilithium, traditional algorithms)
Safety-critical design certification (ISO 26262, DO-254, ISO 13485)
Production management and supply chain coordination
This turnkey approach eliminates the complexity of integrating multiple suppliers for processing, analog functions, and security components.
Reduced Time-to-Market
With 90 additional designers and proven ASIC development methodologies, SEALSQ can accelerate development timelines for quantum-resistant hardware projects. The company's CEO highlighted that the merger positions SEALSQ to tackle specialized designs that were previously beyond reach, delivering custom chips more quickly than before.
European Sovereign Semiconductor Capability
For applications requiring supply chain sovereignty and data protection compliance, SEALSQ offers end-to-end design and production based in France (Grenoble and Toulouse). This addresses regulatory and strategic requirements for automotive, defence, and critical infrastructure applications where European-sourced semiconductors are preferred or required.
Cost-Optimised Custom Solutions
Custom ASICs consolidate multiple functions into single chips, reducing component count, board space, and manufacturing costs at production volumes. By eliminating discrete security co-processors and optimising the entire system-on-chip for specific applications, engineers can achieve better performance at lower total system cost compared to solutions built from general-purpose components.
The Technical Roadmap: QVault TPM and Beyond
SEALSQ's first product demonstrating the IC'ALPS synergy is the QVault TPM (Trusted Platform Module), scheduled for early 2026. This quantum-resistant TPM combines:
NIST-approved post-quantum cryptographic algorithms
RISC-V secure architecture from SEALSQ's QS7001 platform
IC'ALPS' ASIC design and industrialisation expertise
Compliance with TPM 2.0 specifications plus quantum-resistant extensions
The QVault TPM addresses a critical gap in the market: existing TPMs use RSA and ECC algorithms that will become vulnerable as quantum computers advance. By replacing these with Kyber and Dilithium whilst maintaining TPM functional compatibility, SEALSQ enables platform security that remains robust against quantum attacks.
Beyond TPMs, SEALSQ has highlighted development of quantum-resistant secure ASICs for:
Automotive applications requiring both security and functional safety
Industrial IoT devices needing ultra-low-power quantum-resistant operation
Medical devices with 10+ year implantable lifespans
Aerospace and satellite systems with extreme reliability requirements
The company's "Quantum Corridor" initiative in Southern France aims to create a hub for post-quantum semiconductor development, leveraging local talent and infrastructure to accelerate innovation in quantum-resistant hardware.
Conclusion
SEALSQ's acquisition of IC'ALPS represents a strategic convergence of post-quantum cryptographic expertise and custom ASIC design capability. For engineers developing embedded systems with long operational lifespans, this merger delivers practical solutions to the quantum threat: hardware-accelerated, NIST-approved post-quantum cryptography embedded directly into application-specific silicon.
The key advantages of SEALSQ's expanded quantum-resistant hardware capabilities include:
Superior Performance: Hardware-accelerated PQC operations deliver 10–100× faster execution compared to software implementations
Power Efficiency: Dedicated cryptographic engines reduce power consumption, enabling quantum-resistant security in battery-powered devices
Application-Specific Optimisation: Custom ASICs integrate security with analog sensing, power management, and domain-specific processing
Safety Certification: Combined security and functional safety (ISO 26262, ISO 13485) in single-chip solutions
Future-Proof Architecture: NIST-standardised algorithms with hardware flexibility to support evolving security requirements
As quantum computing advances, the window for implementing quantum-resistant security is closing. Systems designed today with traditional cryptography face potential vulnerability within their operational lifespans. SEALSQ's combined capabilities enable engineers to design embedded systems that are secure-by-design against both current and future quantum threats.
For engineering teams evaluating post-quantum security strategies, hardware-based solutions offer significant advantages over software-only approaches, particularly for resource-constrained embedded systems, safety-critical applications, and devices with extended operational lifetimes.
What next?
Ready to future-proof your embedded systems against quantum threats?
Contact Ineltek today to discuss how SEALSQ's quantum-resistant hardware solutions can be integrated into your next-generation designs. Our technical team can help evaluate your security requirements and identify the optimal approach for implementing post-quantum cryptography in your applications.
Get in touch:
Discuss SEALSQ secure ASIC capabilities for your application
Schedule a technical consultation on post-quantum security strategies
Request information on the QS7001 platform and upcoming QVault TPM
Explore custom quantum-resistant hardware development options
Don't wait until quantum computers threaten your product's security – design quantum-resistant protection into your systems from the beginning.
FAQs
Related to SealSQ Acquisition of IC'Alps
Q. What is the main advantage of SEALSQ's acquisition of IC'ALPS for embedded system security?
A. The acquisition combines SEALSQ's post-quantum cryptographic expertise with IC'ALPS' custom ASIC design capabilities, enabling engineers to embed NIST-approved quantum-resistant algorithms (Kyber and Dilithium) directly into application-specific hardware. This delivers superior performance, lower power consumption, and integrated security compared to software-based approaches or discrete security chips.
Q. Which industries benefit most from SEALSQ's quantum-resistant hardware capabilities?
A. Automotive electronics, industrial IoT, medical devices, and aerospace applications benefit most because these sectors require long operational lifespans (10–20 years) where quantum computing threats will emerge during the product's service life. Additionally, these industries require both security and domain-specific certifications (ISO 26262 for automotive, ISO 13485 for medical) that SEALSQ can now deliver in integrated solutions.
Q. When will SEALSQ's first quantum-resistant products from the IC'ALPS collaboration be available?
A. The QVault TPM (Trusted Platform Module), which combines SEALSQ's QS7001 RISC-V architecture with IC'ALPS' ASIC design expertise, is expected in early 2026. This will be the first commercially available TPM with integrated NIST-approved post-quantum cryptographic algorithms, providing quantum-resistant platform security for computing systems.
General questions about Post-Quantum security
Q. Can existing embedded systems be upgraded to use quantum-resistant hardware, or does this require complete redesign?
A. Existing systems typically cannot be hardware-upgraded to quantum-resistant security, as this requires silicon-level changes. However, engineers can design quantum-resistant security into new product generations or major revisions. SEALSQ's approach enables both standalone secure elements (that can be added to existing architectures) and fully integrated custom ASICs (for new designs). The optimal approach depends on the system architecture, performance requirements, and product lifecycle stage.
Q. How does hardware-based quantum-resistant security compare to software implementations in terms of power consumption?
A. Hardware-accelerated post-quantum cryptography consumes 5–10 times less power than software implementations running on general-purpose processors. Dedicated cryptographic engines optimised for Kyber and Dilithium algorithms can perform operations in 10–20 milliwatts, whereas software PQC can consume 100+ milliwatts during the same operations, making hardware solutions essential for battery-powered embedded systems.
Q. What are CRYSTALS-Kyber and CRYSTALS-Dilithium, and why are they important for quantum-resistant hardware?
A. CRYSTALS-Kyber is a NIST-approved post-quantum key encapsulation mechanism used for secure encryption key exchange, whilst CRYSTALS-Dilithium is a post-quantum digital signature algorithm for authentication and data integrity. These algorithms are designed to resist attacks from both classical and quantum computers. They are computationally intensive, making hardware acceleration essential for practical implementation in embedded systems.
Quantum-Resistant hardware versus software-based solutions
Engineers frequently ask about the advantages of hardware-based post-quantum cryptography compared to software implementations. Understanding these differences is critical for system design decisions:
Q: How does hardware-accelerated post-quantum cryptography improve performance compared to software implementations?
A: Hardware acceleration provides dedicated silicon logic optimised specifically for PQC algorithms. CRYSTALS-Kyber and Dilithium are computationally intensive, involving large matrix operations and polynomial arithmetic. Software implementations on general-purpose CPUs can be 10–100 times slower and consume significantly more power. Hardware accelerators execute these operations in parallel using custom datapaths, delivering cryptographic operations in milliseconds rather than seconds whilst drawing a fraction of the power. This makes quantum-resistant security practical for battery-powered IoT devices and real-time embedded systems.
Q: Why is embedding security in custom ASICs more secure than using external security chips?
A: Custom ASICs with integrated security eliminate external interfaces that can be probed or intercepted. When cryptographic operations occur entirely within a single chip, there are no external buses carrying encryption keys or sensitive data that could be monitored by an attacker. Additionally, ASIC implementations can include physical security features such as active shield layers, light sensors to detect decapsulation attacks, and analog sensors to detect voltage or temperature tampering. The root-of-trust is established in silicon during manufacturing, creating a more robust security foundation than software-only approaches or systems using discrete security chips connected via standard interfaces.
Q: How does SEALSQ's approach future-proof embedded systems against evolving quantum threats?
A: SEALSQ's quantum-resistant hardware uses NIST-standardised algorithms (Kyber and Dilithium) that have undergone extensive cryptanalysis and are designed to resist known quantum attacks. Hardware implementations can be updated via secure firmware to support algorithm variants or additional security layers as standards evolve. The RISC-V architecture provides flexibility to implement algorithm updates without requiring complete hardware redesign. Additionally, by designing security into custom ASICs from the beginning, systems are architected with appropriate key storage, random number generation, and cryptographic acceleration to support long-term security requirements without retrofitting external security solutions.
