ESP32-C61 Wi-Fi 6 and Bluetooth 5 SoC Next-Gen IoT Connectivity
- adammiller961
- Sep 29
- 9 min read
Introduction – ESP32-C61 Redefines Wireless IoT Connectivity
Espressif Systems has introduced the ESP32-C61, a cutting-edge system-on-chip (SoC) that brings IEEE 802.11ax Wi-Fi 6 and Bluetooth 5 (LE) connectivity to resource-constrained IoT applications. As wireless standards evolve and security requirements intensify, the ESP32-C61 addresses modern design challenges whilst maintaining the cost-effectiveness and ease-of-use that engineers have come to expect from the ESP32 family.
The ESP32-C61 integrates a 32-bit RISC-V single-core processor running at up to 160 MHz, delivering a CoreMark score of 553.78 at maximum frequency. With multiple variants offering different in-package flash and PSRAM configurations, the chip provides flexibility for applications ranging from basic sensor nodes to sophisticated edge AI implementations.
Available in a compact QFN40 (5×5 mm) package with 30 programmable GPIOs, the ESP32-C61 supports operating temperatures from –40°C to 105°C, making it suitable for demanding industrial environments whilst remaining accessible for consumer electronics applications.
Features of ESP32-C61 Addressing Modern IoT Requirements
Wi-Fi 6 (IEEE 802.11ax) Connectivity
The ESP32-C61 brings Wi-Fi 6 capabilities to the
IoT market through a 1T1R configuration operating in the 2.4 GHz band (2412 – 2484 MHz). The implementation includes:
OFDMA Support: Uplink and downlink Orthogonal Frequency-Division Multiple Access enhances connectivity in congested environments, allowing multiple devices to share channels more efficiently – critical for dense IoT deployments.
Downlink MU-MIMO: Multi-user, multiple input, multiple output technology increases network capacity by enabling simultaneous data transmission to multiple devices.
Target Wake Time (TWT): This power-saving mechanism allows devices to negotiate when and how frequently they wake to send or receive data, significantly reducing power consumption for battery-operated devices.
BSS Colouring and Spatial Reuse: These technologies maximise parallel transmissions and minimise interference in crowded wireless environments.
Extended Modulation Schemes: Support for MCS0 – MCS9 in 20 MHz-only non-AP mode, with transmit power up to 19.5 dBm for 802.11ax and up to 21 dBm for 802.11b.
The chip maintains full compatibility with IEEE 802.11b/g/n protocols, supporting 20 MHz and 40 MHz bandwidth with data rates up to 150 Mbps. This backwards compatibility ensures seamless integration into existing wireless infrastructures.
Bluetooth 5 (LE) with Advanced Features
Bluetooth Low Energy implementation in the ESP32-C61 is Bluetooth Core 6.0 certified and includes:
Extended Range and Data Rates: Support for 125 Kbps, 500 Kbps, 1 Mbps, and 2 Mbps speeds, with coded PHY for extended range applications.
Direction Finding (AoA/AoD): Angle of Arrival and Angle of Departure capabilities enable precise location services for asset tracking and indoor positioning systems.
Periodic Advertising with Responses (PAwR): Enhances efficiency for applications requiring bidirectional communication with multiple peripheral devices.
LE Power Control: Dynamically adjusts transmission power to optimise battery life and connection quality.
Multiple Role Support: Devices can operate concurrently in Broadcaster, Observer, Central, and Peripheral roles, enabling complex network topologies.
Bluetooth LE receiver sensitivity reaches –106 dBm at 125 Kbps, whilst transmit power extends up to 21 dBm, providing robust connectivity over extended distances.
High-Performance 32-bit RISC-V Processor
The ESP32-C61 features a custom RISC-V single-core processor (HP CPU) with:
Five-Stage Pipeline: Operating at up to 160 MHz, delivering 3.46 CoreMark/MHz.
RV32IMAC ISA: Base integer (I), multiplication/division (M), atomic (A), and compressed (C) standard extensions, plus Zc extensions (Zcb, Zcmp, Zcmt) for enhanced code density.
32 KB L1 Cache: Reduces latency for instruction and data access, improving overall system performance.
Advanced Debug Capabilities: RISC-V trace encoder compatible with Efficient Trace for RISC-V Version 2.0, hardware breakpoints/watchpoints, and JTAG/USB debug support.
Privilege Modes: Machine (M) and User (U) modes with Physical Memory Protection (PMP) for up to 16 configurable regions.
Memory Architecture and External Storage
Internal Memory:
256 KB ROM for bootloader and core functions
320 KB SRAM for data and instructions
4096-bit eFuse (1792 bits user-accessible)
In-Package Options:
ESP32-C61HF4: 4 MB Quad SPI flash
ESP32-C61HR2: 2 MB Quad SPI PSRAM
ESP32-C61HR8: 8 MB Quad SPI PSRAM
External Memory Support: The chip supports connection to off-package flash and PSRAM via SPI, Dual SPI, Quad SPI, and QPI interfaces. Through the cache system, it can map up to 32 MB of instruction memory space and 32 MB of data memory space. The SPI clock frequency reaches 120 MHz for both in-package and off-package memory.
Rich Peripheral Set
Connectivity Interfaces:
3× UART (up to 5 Mbaud)
General-purpose SPI (1-, 2-, 4-line modes)
I2C (standard and fast modes)
I2S (master/slave, full/half-duplex, TDM and PDM support)
USB Serial/JTAG controller (USB 2.0 full-speed compliant)
SDIO 2.0 slave controller (up to 50 MHz)
LED PWM controller (6 channels, up to 20-bit resolution)
Analog Interfaces:
12-bit SAR ADC with up to 4 channels
Temperature sensor (–40°C to 125°C range)
Analog voltage comparator
System Features:
Two 54-bit general-purpose timers
52-bit system timer
Multiple watchdog timers
GDMA controller with 4 channels
Event Task Matrix (ETM) for hardware-level event handling
All GPIOs feature flexible routing via the IO MUX and GPIO Matrix, allowing most peripheral signals to connect to any available pin.
Detailed Specifications for ESP32-C61 Variants
Power Supply and Consumption
Operating Voltage: 3.0 V – 3.6 V (3.3 V nominal) on VDDA and VDDPST pins.
Current Consumption:
Active Mode (RF Working):
Wi-Fi TX: 802.11b @ 21 dBm: 360 mA peak; 802.11ax @ 15 dBm: 240 mA peak
Wi-Fi RX: 88 mA (802.11ax, HE20)
Bluetooth LE TX @ 18 dBm: 283 mA peak
Bluetooth LE RX: 81 mA
Modem-Sleep Mode (160 MHz CPU):
WAITI instruction: 11 mA
CPU whilst loop: 16 mA
Low-Power Modes:
Light-sleep: 0.2 mA (all peripherals disabled)
Deep-sleep: 10 µA (LP timer and memory powered)
RF Performance Characteristics
Wi-Fi (2.4 GHz):
RX sensitivity: –94 dBm (802.11ax, HE20, MCS0) to –68 dBm (MCS9)
TX power: Up to 21 dBm (802.11b), 19.5 dBm (802.11ax)
Adjacent channel rejection: 37 dB (802.11ax, MCS0)
Bluetooth LE:
RX sensitivity: –106 dBm (125 Kbps) to –94 dBm (2 Mbps)
TX power: Up to 21 dBm with configurable output levels
EVM performance exceeds Bluetooth Core specification requirements
Package and Environmental Specifications
Package: QFN40 (5×5 mm)
30 programmable GPIOs
Operating temperature: –40°C to 105°C (High temperature variants)
Storage temperature: –40°C to 150°C
Industry Applications and Use Cases
Smart Home Devices
The ESP32-C61's Wi-Fi 6 support with TWT makes it ideal for battery-powered sensors, smart locks, and environmental monitors. Bluetooth LE enables commissioning and local control whilst Wi-Fi provides cloud connectivity.
Industrial Automation
Operating across extended temperature ranges with robust RF performance, the ESP32-C61 suits predictive maintenance sensors, industrial wireless controllers, and condition monitoring systems. SDIO slave functionality enables integration with existing industrial processors.
Healthcare and Wearables
Direction finding capabilities support asset tracking in hospitals, whilst low power consumption enables long-lasting wearable health monitors. The temperature sensor facilitates body temperature monitoring applications.
Smart Agriculture
Deep-sleep power consumption of just 10 µA enables multi-year battery life for soil moisture sensors, environmental monitoring stations, and livestock tracking tags deployed across large agricultural areas.
POS Machines and Retail
Secure wireless connectivity with hardware encryption supports payment terminals and inventory management systems. USB Serial/JTAG simplifies in-field updates and diagnostics.
Edge AI and Audio Devices
With 320 KB SRAM and PSRAM support, the ESP32-C61 can run lightweight AI inference for keyword spotting and simple pattern recognition. I2S interfaces with PDM support enable high-quality audio applications.
Security Features for ESP32-C61
Hardware-Accelerated Cryptography
ECC Accelerator: Supports P-192 and P-256 curves with 11 working modes for elliptic curve operations.
ECDSA Support: Hardware acceleration for digital signature generation and verification with fixed-duration operations to resist side-channel attacks.
SHA Accelerator: Hardware implementation of SHA-1, SHA-224, and SHA-256 with both CPU-based and DMA-based modes.
XTS-AES Encryption: Hardware-accelerated flash and PSRAM encryption compliant with IEEE Std 1619-2007, protecting application code and sensitive data in external memory.
Secure Boot and Code Protection
Secure Boot: Prevents execution of unauthorised firmware through cryptographic signature verification during the boot process.
Flash/PSRAM Encryption: Transparent hardware encryption/decryption allows secure storage and execution of code and data from external memory.
eFuse-Based Configuration: One-time programmable eFuse bits control security features, preventing unauthorised modification of security policies.
Advanced Security Features
True Random Number Generator (TRNG): Generates cryptographically secure random numbers from thermal noise and asynchronous clock sources.
Access Permission Management (APM): Controls access to memory and peripheral address spaces with configurable permissions for different bus masters.
Power Glitch Detector: Real-time voltage monitoring triggers immediate chip reset upon detecting glitch attacks, with a default threshold around 2.7 V.
Physical Memory Protection (PMP): Up to 16 configurable regions restrict memory access based on privilege levels.
Post-Quantum Cryptography Considerations
Whilst the ESP32-C61 itself doesn't include dedicated post-quantum cryptographic accelerators, its security architecture provides a foundation for implementing PQC algorithms in software. For applications requiring quantum-resistant security, engineers should evaluate solutions like the SEALSQ QS7001 (available through Ineltek's portfolio) which includes hardware-accelerated Kyber and Dilithium algorithms.
Getting Started with ESP32-C61
Development Ecosystem
Hardware:
ESP32-C61 development boards (check Ineltek's latest offerings)
Reference schematics and PCB layouts available from Espressif
Software:
ESP-IDF (Espressif IoT Development Framework)
Arduino IDE support
ESP-WIFI-MESH networking
TLS 1.0, 1.1, and 1.2 support
Comprehensive driver libraries for all peripherals
Tools:
Espressif KiCad libraries
Flash Download Tool
RF Test Tool for production calibration
USB-JTAG debugging without external hardware
Design Considerations
Power Supply: Use 3.3 V regulated supply with at least 500 mA current capability. Place 10 µF and 0.1 µF decoupling capacitors close to power pins.
RF Matching: The reference design includes a CLCCL matching circuit. Custom antenna implementations require careful impedance matching and RF testing.
Pin Selection: Consider strapping pin requirements (GPIO7, GPIO8, GPIO9, MTMS, MTDI) for boot mode control. Review restrictions for pins connected to in-package flash/PSRAM.
Thermal Management: The chip's small form factor and low power consumption simplify thermal design, but ensure adequate airflow for sustained high-performance operation.
Comparison: ESP32-C61 vs. Competitor Solutions
The ESP32-C61 occupies a unique position in the wireless MCU market:
vs. ESP32-C3: Adds Wi-Fi 6 support and enhanced security features whilst maintaining similar pricing and form factor.
vs. ESP32-C6: The C61 offers a cost-optimised alternative with reduced GPIO count but maintains core Wi-Fi 6 and Bluetooth 5 functionality.
vs. Nordic nRF5340: ESP32-C61 provides integrated Wi-Fi 6, eliminating the need for separate connectivity solutions in dual-radio applications.
vs. STM32WB Series: Espressif's mature software ecosystem and lower pricing provide advantages for high-volume IoT applications.
vs. Silicon Labs MG24: The ESP32-C61 offers superior Wi-Fi performance and a more comprehensive peripheral set at competitive pricing.
Conclusion
The ESP32-C61 represents Espressif's commitment to bringing advanced wireless technologies to cost-sensitive IoT applications. By integrating Wi-Fi 6 and Bluetooth 5 (LE) with robust security features, comprehensive peripheral support, and exceptional power efficiency, the chip addresses the evolving requirements of modern connected devices.
From smart home products requiring years of battery life to industrial sensors operating in harsh environments, the ESP32-C61 provides engineers with a versatile platform that balances performance, features, and cost-effectiveness.
See for Yourself
Ready to evaluate the ESP32-C61 for your next design? Visit Ineltek's ESP32-C61 product page for datasheets, development boards, and technical support, or contact the Ineltek team for expert guidance, competitive pricing, and rapid sample delivery.
FAQs for the Espressif ESP32-C61 covering Wi-Fi 6 and Bluetooth 5 implementation
What Wi-Fi 6 features does the ESP32-C61 support?
A. The ESP32-C61 implements key Wi-Fi 6 features including OFDMA (uplink and downlink), downlink MU-MIMO, Target Wake Time for power saving, BSS colouring, spatial reuse, and modulation schemes up to MCS9 in 20 MHz non-AP mode. It maintains backwards compatibility with 802.11b/g/n whilst delivering the efficiency improvements that make Wi-Fi 6 valuable for IoT applications.
Q. How does the ESP32-C61 power consumption compare to previous ESP32 variants?
A. The ESP32-C61 achieves Deep-sleep current consumption of just 10 µA with the LP system active, and Light-sleep consumption of 200 µA. During active Wi-Fi 6 receive operations, current consumption averages 88 mA, representing significant efficiency improvements over earlier ESP32 variants through both architectural enhancements and Wi-Fi 6 power-saving features like TWT.
Q. Can the ESP32-C61 run alongside in-package flash and PSRAM simultaneously?
A. The ESP32-C61 variants provide either in-package flash (ESP32-C61HF4 with 4 MB) or in-package PSRAM (ESP32-C61HR2 with 2 MB, or ESP32-C61HR8 with 8 MB), but not both within the same package. However, the chip supports connecting off-package flash and PSRAM simultaneously via its dual SPI controllers, allowing flexible memory configurations up to 32 MB each for instruction and data spaces.
Q. What security certifications and compliance does the ESP32-C61 support?
A. The ESP32-C61 includes hardware security features compliant with industry standards including secure boot, flash encryption using XTS-AES (IEEE Std 1619-2007), ECDSA digital signatures (FIPS 186-3 curves), and SHA acceleration (FIPS PUB 180-4). The chip supports building systems that meet various regulatory requirements, though specific certifications depend on the complete product implementation and testing.
Q. How does Bluetooth LE direction finding work on the ESP32-C61?
A. The ESP32-C61 supports Bluetooth LE direction finding through Angle of Arrival (AoA) and Angle of Departure (AoD) methods. These techniques use antenna arrays to determine the direction of incoming or outgoing Bluetooth signals, enabling precise indoor positioning and asset tracking applications with accuracy down to sub-metre levels when properly implemented with appropriate antenna configurations.
Q. What development tools and software support are available for ESP32-C61?
A. Espressif provides comprehensive development support including the ESP-IDF framework with complete peripheral drivers, Arduino IDE compatibility, extensive documentation, RF calibration and testing tools, USB-JTAG debugging without external hardware, and reference schematics with PCB layouts. Ineltek offers additional technical support, including Field Application Engineer assistance for complex design challenges.
